Allen-Bradley 1785-L80B/E PLC-5/80 Processor Module

Allen-Bradley 1785-L80B/E PLC-5/80 Processor Module

Configured for high-density I/O handling and real-time execution in 1771 chassis architecture, the Allen-Bradley 1785-L80B/E (1785-L80B Processor Module) provides direct physical/electrical execution across Data Highway Plus (DH+) and Remote I/O network topologies.

Suffix Breakdown & Model Matrix

The 1785-L80B/E designation breaks down into precise physical and architectural characteristics within the PLC-5/80 family:

• 1785: Base bulleted product line identifier for Allen-Bradley PLC-5 chassis-based processor modules.
• L80: Processor capacity tier (PLC-5/80 class), establishing support for up to 100K words of SRAM memory and up to 3,072 total I/O capacity.
• B: Hardware Series revision code, defining the physical component layout and backplane interface circuitry.
• /E: Firmware Revision level, governing internal system executive code, instruction timing execution, and firmware flash compatibility across backplane configurations.

Hardware Specifications

Backplane Bus Communication Velocity & Network Integrity

The 1785-L80B/E integrates directly with the 1771 backplane bus, drawing 2.3 to 3.3 A at 5 VDC to power its internal processing logic and channel drivers. The module utilizes deterministic backplane scan loops to update discrete and analog input data structures. Network transaction latency on Remote I/O links scales dynamically with node configuration and baud rates, achieving scan times of 3 ms at 230.4 kbit/s per rack. Communication channels (1A, 1B, 2A, 2B) support hardware-level protocol conversion and isolated signal paths to ensure deterministic network bandwidth allocation without degrading CPU execution cycles.

Frequently Asked Questions

Q: What is the backplane current draw for the 1785-L80B/E module?

A: The processor draws between 2.3 A and 3.3 A at 5 VDC from the 1771 chassis power supply backplane.

Q: Can the 1785-L80B/E processor be inserted or removed under power?

A: No, the 1771 chassis backplane does not support hot-swapping for processor modules. Power to the chassis must be removed before installation or removal to prevent backplane damage or unpredicted system state trips.

Q: How is user memory retained during a power interruption?

A: Internal SRAM memory retention during power-down states requires an installed 1770-XYC or 1785-BATM lithium battery connected to the front-panel battery leads.

Field Installation Guidelines

• Chassis Powering: Verify that the 1771 system chassis power supply is completely de-energized before inserting the module into the left-most controller slot.
• Grounding & Shielding: Ensure the 1771 chassis enclosure is connected to the master ground bus with a minimum 8 AWG copper conductor. Terminate DH+ and Remote I/O cable shields at one end only to prevent ground loop currents.
• Wiring Clearance: Maintain a minimum 2-inch clearance between signal/communication wiring (DH+, RS-232) and high-voltage AC power lines to suppress electromagnetic interference.
• Battery Connection: Key the lithium battery plug into the module connector prior to final rack mounting to ensure SRAM retention during initial commissioning tests.